The Embedded Microprocessor Benchmark Consortium (EEMBC) released Monday AutoBench 2.0, an industry-developed benchmark suite comprised of automotive workloads that integrate with the consortium’s tried-and-proven EEMBC MultiBench tool.
AutoBench 2.0 is a suite of benchmarks that allows processor and system designers to analyze, test, and improve multicore automotive processors. It uses two forms of concurrency – processing multiple data streams that uses common code running over multiple threads and demonstrating how well a processor scales over scalable data inputs; and multiple workload processing that shows the scalability of general-purpose processing, demonstrating concurrency over both code and data.
AutoBench 2.0 combines a range of automotive workloads with the EEMBC Multi-Instance-Test Harness (MITH), compatible and portable with any multicore processors and operating systems. MITH uses a thread-based API (POSIX-compliant) to establish a common programming model that communicates with the benchmark through an abstraction layer and provides a flexible interface to allow a wide variety of thread-enabled workloads to be tested.
Industry alliance EEMBC develops benchmarks to help system designers select the optimal processors and understand the performance and energy characteristics of their systems. EEMBC has benchmark suites targeting cloud and big data, mobile devices (for phones and tablets), networking, ultra-low power microcontrollers, the Internet of Things (IoT), digital media, automotive, and other application areas. EEMBC also has benchmarks for general-purpose performance analysis including CoreMark, MultiBench (multicore) and FPMark (floating-point).
The over 100 MultiBench workloads can be individually parameterized to vary the amount of concurrency being implemented by the benchmark. By applying incrementally challenging and concurrent workloads, system designers can optimize programs for specific processors and systems, as well as assess the impact of memory bottlenecks, cache coherency, thread scheduling support, and efficiency of synchronization between threads.
MultiBench allows processor and system designers to test and analyze the performance and scalability of multicore architectures and platforms. With the increasing adoption of multicore technology into automotive applications, the AutoBench 2.0 provides an important performance metric for system designers testing the efficacy of multicore processors.
AutoBench 2.0 upgrades and turbocharges versions of the kernels contained in EEMBC’s widely-used AutoBench 1.1, including angle-to-time conversion, CAN remote-data request, matrix arithmetic, road-speed calculation, tooth-to-spark, and other key algorithms commonly employed in automotive systems.
AutoBench 2.0 uses two forms of concurrency – processing multiple data streams that uses common code running over multiple threads and demonstrating how well a processor scales over scalable data inputs; and multiple workload processing that shows the scalability of general-purpose processing, demonstrating concurrency over both code and data.
The AutoBench 2.0 workloads can be individually parameterized to vary the amount of concurrency being implemented by the benchmark. By applying incrementally challenging and concurrent workloads, system designers can optimize programs for specific processors and systems, as well as assess the impact of memory bottlenecks, cache coherency, and thread scheduling support.
The range of workloads support judicious monitoring of parameters that highlight the strengths and weaknesses of multicore automotive processors and systems. AutoBench 2.0 workloads can be individually parameterized to vary the amount of concurrency being implemented by the kernels. By applying incrementally-challenging workloads, AutoBench 2.0 tests scalability within the system.
Like the original MultiBench, AutoBench 2.0 targets the evaluation of scalable symmetrical multicore processor (SMP) architectures with shared memory. To simplify porting and increase portability, the MultiBench framework was written for Linux‐based operating systems using GNU‐like tool chains and was implemented with an abstraction layer and test harness to facilitate porting to different platforms.
The abstraction layer provides a method to implement thread scheduling, signaling, and affinity. By default, the threading is implemented with a POSIX-compliant, pthread programming interface.
“Beyond helping understand and evaluate the performance of specific processors and systems, AutoBench 2.0 assesses the impact of memory bottlenecks, efficiency of thread synchronization, and other related functions in automotive systems using multicore processors so designers can make informed decisions that optimize their products,” said Peter Torelli, EEMBC director of software engineering.
“Putting multiple execution cores into a single processor does not by itself guarantee greater multiples of processing power, and there is no prima facie reason to expect that a multicore processor will deliver a dramatic increase in a system’s capabilities, computing resources, or throughput,” said Paul Teich, principal analyst at Tirias Research. “This is why AutoBench 2.0 is so valuable. It shows when parallelization and scaling contribute to performance — and, at least as important, when and why they don’t.”
